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| Files in vmm1.2_example.tar Current file: dummy_rtl.v ReadMe.txt vmm_cfg.sv vmm_cov.sv vmm_drv.sv vmm_env.sv vmm_gen.sv vmm_interface.sv vmm_packet.sv vmm_rcv.sv vmm_sbd.sv vmm_scn.sv vmm_top.sv |
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///////////////////////////////////////
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//// ////
//// VMM 1.2 example ////
//// ////
//// For more vmm examples ////
//// visit www.testbench.in ////
//// ////
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//-----------------------------------------------------------------------------
// This is a dummy rtl
//-----------------------------------------------------------------------------
module dummy_rtl(address, i_data, rdwr, clock, en, reset, o_data);
input [7:0] address;
input [7:0] i_data;
output reg [7:0] o_data;
input rdwr;
input clock;
input en;
input reset;
reg [7:0] mem [255:0];
always@(posedge clock or posedge reset) begin
if(reset) begin
o_data <= 8'h0;
end else if (en) begin
if (rdwr) begin
mem[address] <= i_data;
end else begin
o_data <= mem[address];
end
end else begin
o_data <= 8'h0;
end
end
endmodule
//-----------------------------------------------------------------------------
// end of file
//-----------------------------------------------------------------------------