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INDEX


............INTRODUCTION

............SPECIFICATION
..................... Switch Specification
..................... Packet Format
..................... Packet Header
..................... Configuration
..................... Interface Specification
..................... Memory Interface
..................... Input Port
..................... Output Port

............VERIFICATION PLAN
..................... Overview
..................... Feature Extraction
..................... Stimulus Generation Plan
..................... Coverage Plan
..................... Verification Environment

............PHASE 1 TOP
..................... Interfaces
..................... Testcase
..................... Top Module
..................... Top Module Source Code

............PHASE 2 ENVIRONMENT
..................... Environment Class
..................... Run
..................... Environment Class Source Code

............PHASE 3 RESET

............PHASE 4 PACKET
..................... Packet Class Source Code
..................... Program Block Source Code

............PHASE 5 DRIVER
..................... Driver Class Source Code
..................... Environment Class Source Code

............PHASE 6 RECEIVER
..................... Receiver Class Source Code
..................... Environment Class Source Code

............PHASE 7 SCOREBOARD
..................... Scoreboard Class Source Code
..................... Source Code Of The Environment Class

............PHASE 8 COVERAGE
..................... Source Code Of Coverage Class
..................... Source Code Of The Scoreboard Class

............PHASE 9 TESTCASE
..................... Source Code Of Constraint Testcase

Index
Introduction
Specification
Verification Plan
Phase 1 Top
Phase 2 Environment
Phase 3 Reset
Phase 4 Packet
Phase 5 Driver
Phase 6 Receiver
Phase 7 Scoreboard
Phase 8 Coverage
Phase 9 Testcase

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