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Specman E
Interview Questions
TEST YOUR DFT SKILLS 4
(Q
i
32)
o
e
Fault
i
coverage
o
?
Ans:
The
i
percentage
o
e
of
i
ALL
o
faults
q
(both
r
e
testable
i
and
o
q
j
untestable)
r
e
that
i
are
o
detected
q
by the
z
pattern
u
y
set.
Fault
i
Coverage
o
e
=
i
Detected
o
Faults
q
/
r
e
Total
i
Faults
(Q
i
33)
o
e
Test
i
coverage
o
?
Ans:
The
i
percentage
o
e
of
i
all
o
testable
q
faults
r
e
that
i
are
o
q
j
detected
r
e
by
i
the
o
pattern
q
set.
Test
i
Coverage
o
e
=
i
Detected
o
Faults
q
/
r
e
(Total
i
faults
o
q
j
-
r
e
Untestable
i
Faults)
www.testbench.in
(Q
i
34)
o
e
ATPG
i
effectiveness
o
?
Ans:
A
i
measure
o
e
of
i
the
o
ability
q
of
r
e
the
i
ATPG
o
q
j
tool
r
e
to
i
either
o
provide
q
a test
z
to
u
y
detect
e
o
a
z
x
fault or prove that a test cannot be created.
i
o
e
i
ATG
o
efficiency
q
=
r
e
(Detected
i
+
o
q
j
Untestable
r
e
Faults)
i
/
o
Total
q
Faults
(Q
i
35)
o
e
BIST
i
?
.....w.....w......w......t.....e.....s.....t......b.....e.....n.....c.....h......i.....n
Ans:
www.testbench.in
A
i
built-in
o
e
self-test
i
(BIST)
o
mechanism
q
within
r
e
an
i
integrated
o
q
j
circuit
r
e
(IC)
i
is
o
a
q
function that
z
verifies
u
y
all
e
o
or
z
x
a portion of the internal functionality of the IC. It is the capability of circuit to test itself. generally on-chip circuitry is used to apply a predetermined set of test vectors to internal sections of the circuit. Another on-chip circuit monitors the results of the test and checks them against the stored correct response. BIST can be extended to board-level system.
(Q
i
36)
o
e
Advantages
i
of
o
BIST..!!
Ans:
Replaces
i
external
o
e
tester
i
with
o
on-chip
q
circuitry.
r
e
Avoids
i
the
o
q
j
test
r
e
generation
i
problem.
o
It
q
is technology
z
and
u
y
fault
e
o
model
z
x
independent.
i
o
e
i
(Q
i
37)
o
e
Boundary
i
Scan
o
?
Ans:
www.testbench.in
Boundary
i
scan
o
e
is
i
a
o
method
q
for
r
e
testing
i
interconnects
o
q
j
(thin
r
e
wire
i
lines)
o
on
q
printed circuit
z
boards
u
y
or
e
o
sub-blocks
z
x
inside an integrated circuit. The Joint Test Action Group (JTAG) developed a specification for boundary scan testing contains a description of the Boundary Scan Description Language (BSDL) was added which describes the boundary-scan logic content of IEEE Std 1149.1 compliant devices. Boundary scan is nowadays mostly synonymous with JTAG.
(Q
i
38)
o
e
Tools
i
related
o
to
q
DFT
r
e
from
i
mentor.
Ans:
ATPG
i
&
o
e
Compression
TestKompress
FastScan
.....w.....w......w......t.....e.....s.....t......b.....e.....n.....c.....h......i.....n
DFTAdvisor
FlexTest
www.testbench.in
Memory
i
Test
MBISTArchitect
MacroTest
Boundary
i
Scan
BSDArchitect
Logic
i
BIST
LBISTArchitect
Yield
i
Learning
o
e
and
i
Diagnosis
YieldAssist
www.testbench.in
(Q
i
39)
o
e
Reference..!!
Ans:
1)
i
Electronic
o
e
Design
i
Automation
o
For
q
Integrated
r
e
Circuits
i
Handbook,
o
q
j
by
r
e
Lavagno,Martin
i
and
o
Scheffer.
2)
i
Michael
o
e
L.
i
Bushwell
o
and
q
Vishwani
r
e
D.
i
Agrawal,
o
q
j
r
e
Essentials
i
of
o
Electronic
q
Testing for
z
Digital,
u
y
Memory
e
o
and
z
x
Mixed-Signal VLSI Circuits Kluwer Academic Publishers 2000.
3)
i
Miron
o
e
Abramovici,
i
Melvin
o
A.
q
Breuer,
r
e
and
i
Arthur
o
q
j
D.
r
e
Friedman,
i
Digital
o
Systems
q
Testing and
z
Testable
u
y
Design,
e
o
IEEE
z
x
Press, 1994.
.....w.....w......w......t.....e.....s.....t......b.....e.....n.....c.....h......i.....n
Index
Functional Verification Questions
Functional Verification Questions 2
Test Your Systemverilog Skills 1
Test Your Systemverilog Skills 2
Test Your Systemverilog Skills 3
Test Your Systemverilog Skills 4
Test Your Sva Skills
Test Your Verilog Skills 1
Test Your Verilog Skills 2
Test Your Verilog Skills 3
Test Your Verilog Skills 4
Test Your Verilog Skills 5
Test Your Verilog Skills 6
Test Your Verilog Skills 7
Test Your Verilog Skills 8
Test Your Verilog Skills 9
Test Your Verilog Skills 10
Test Your Verilog Skills 11
Test Your Verilog Skills 12
Test Your Verilog Skills 13
Test Your Verilog Skills 14
Test Your Verilog Skills 15
Test Your Verilog Skills 16
Test Your Verilog Skills 17
Test Your Specman Skills 1
Test Your Specman Skills 2
Test Your Specman Skills 3
Test Your Specman Skills 4
Test Your Sta Skills 1
Test Your Sta Skills 2
Test Your Sta Skills 3
Test Your Sta Skills 4
Test Your Sta Skills 5
Test Your Sta Skills 6
Test Your Sta Skills 7
Test Your Dft Skills 1
Test Your Dft Skills 2
Test Your Dft Skills 3
Test Your Dft Skills 4
Test Your Uvm Ovm Skills
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