#include <rvm_std_lib.vrh>
#ifndef CFG_XTOR_CLASS
#define CFG_XTOR_CLASS

#define CFG_element(name,add,rstvl) bit [15:0] name/**/_Data = rstvl; 
#define CFG_methods(name,add,rstvl) task write_/**/name (bit [15:0]     Data) {  CPU_wr( add , Data ) ; } \
function bit [15:0] read_/**/name () { read_/**/name = CPU_rd( add ); }

class cfg_xtor extends rvm_xactor{
cfg_driver drvr;

// declare all the register feilds using macros
CFG_element(Tx_Hwmark                ,7'd000,16'h0009)
CFG_element(Tx_Lwmark                ,7'd001,16'h0008)
CFG_element(pause_frame_send_en      ,7'd002,16'h0000)
CFG_element(pause_quanta_set         ,7'd003,16'h0000)
CFG_element(IFGset                   ,7'd004,16'h000c)
CFG_element(FullDuplex               ,7'd005,16'h0001)
CFG_element(MaxRetry                 ,7'd006,16'h0002)
CFG_element(MAC_tx_add_en            ,7'd007,16'h0000)
CFG_element(MAC_tx_add_prom_data     ,7'd008,16'h0000)
CFG_element(MAC_tx_add_prom_add      ,7'd009,16'h0000)
CFG_element(MAC_tx_add_prom_wr       ,7'd010,16'h0000)
CFG_element(tx_pause_en              ,7'd011,16'h0000)
CFG_element(xoff_cpu                 ,7'd012,16'h0000)
CFG_element(xon_cpu                  ,7'd013,16'h0000)
CFG_element(MAC_rx_add_chk_en        ,7'd014,16'h0000)
CFG_element(MAC_rx_add_prom_data     ,7'd015,16'h0000)
CFG_element(MAC_rx_add_prom_add      ,7'd016,16'h0000)
CFG_element(MAC_rx_add_prom_wr       ,7'd017,16'h0000)
CFG_element(broadcast_filter_en      ,7'd018,16'h0000)
CFG_element(broadcast_bucket_depth   ,7'd019,16'h0000)
CFG_element(broadcast_bucket_interval,7'd020,16'h0000)
CFG_element(RX_APPEND_CRC            ,7'd021,16'h0000)
CFG_element(Rx_Hwmark                ,7'd022,16'h001a)
CFG_element(Rx_Lwmark                ,7'd023,16'h0010)
CFG_element(CRC_chk_en               ,7'd024,16'h0000)
CFG_element(RX_IFG_SET               ,7'd025,16'h000c)
CFG_element(RX_MAX_LENGTH            ,7'd026,16'h2710)
CFG_element(RX_MIN_LENGTH            ,7'd027,16'h0040)
CFG_element(CPU_rd_addr              ,7'd028,16'h0000)
CFG_element(CPU_rd_apply             ,7'd029,16'h0000)
CFG_element(CPU_rd_grant             ,7'd030,16'h0000)
CFG_element(CPU_rd_dout_l            ,7'd031,16'h0000)
CFG_element(CPU_rd_dout_h            ,7'd032,16'h0000)
CFG_element(Line_loop_en             ,7'd033,16'h0000)
CFG_element(Speed                    ,7'd034,16'h0004)

// Define all the methods to access reg feilds
CFG_methods(Tx_Hwmark                ,7'd000,16'h0009)
CFG_methods(Tx_Lwmark                ,7'd001,16'h0008)
CFG_methods(pause_frame_send_en      ,7'd002,16'h0000)
CFG_methods(pause_quanta_set         ,7'd003,16'h0000)
CFG_methods(IFGset                   ,7'd004,16'h000c)
CFG_methods(FullDuplex               ,7'd005,16'h0001)
CFG_methods(MaxRetry                 ,7'd006,16'h0002)
CFG_methods(MAC_tx_add_en            ,7'd007,16'h0000)
CFG_methods(MAC_tx_add_prom_data     ,7'd008,16'h0000)
CFG_methods(MAC_tx_add_prom_add      ,7'd009,16'h0000)
CFG_methods(MAC_tx_add_prom_wr       ,7'd010,16'h0000)
CFG_methods(tx_pause_en              ,7'd011,16'h0000)
CFG_methods(xoff_cpu                 ,7'd012,16'h0000)
CFG_methods(xon_cpu                  ,7'd013,16'h0000)
CFG_methods(MAC_rx_add_chk_en        ,7'd014,16'h0000)
CFG_methods(MAC_rx_add_prom_data     ,7'd015,16'h0000)
CFG_methods(MAC_rx_add_prom_add      ,7'd016,16'h0000)
CFG_methods(MAC_rx_add_prom_wr       ,7'd017,16'h0000)
CFG_methods(broadcast_filter_en      ,7'd018,16'h0000)
CFG_methods(broadcast_bucket_depth   ,7'd019,16'h0000)
CFG_methods(broadcast_bucket_interval,7'd020,16'h0000)
CFG_methods(RX_APPEND_CRC            ,7'd021,16'h0000)
CFG_methods(Rx_Hwmark                ,7'd022,16'h001a)
CFG_methods(Rx_Lwmark                ,7'd023,16'h0010)
CFG_methods(CRC_chk_en               ,7'd024,16'h0000)
CFG_methods(RX_IFG_SET               ,7'd025,16'h000c)
CFG_methods(RX_MAX_LENGTH            ,7'd026,16'h2710)
CFG_methods(RX_MIN_LENGTH            ,7'd027,16'h0040)
CFG_methods(CPU_rd_addr              ,7'd028,16'h0000)
CFG_methods(CPU_rd_apply             ,7'd029,16'h0000)
CFG_methods(CPU_rd_grant             ,7'd030,16'h0000)
CFG_methods(CPU_rd_dout_l            ,7'd031,16'h0000)
CFG_methods(CPU_rd_dout_h            ,7'd032,16'h0000)
CFG_methods(Line_loop_en             ,7'd033,16'h0000)
CFG_methods(Speed                    ,7'd034,16'h0004)

task new(string name,cfg_driver drvr);
task CPU_init();
task CPU_wr(bit [6:0]      Addr, bit [15:0]     Data);
function bit [15:0] CPU_rd(bit [6:0]      Addr);
task display();
}

task cfg_xtor::new(string name,cfg_driver drvr){
super.new("CFG_XTOR",name);
log = new("CFG_XTOR",name);
this.drvr = drvr;
}
task  cfg_xtor::CPU_init()
 {
       drvr.drive_CA   (0);
       drvr.drive_CD_in(0);
       drvr.drive_WRB  (1);
       drvr.drive_CSB  (1);
       drvr.drive_CPU_init_end(0);
 }


task   cfg_xtor::CPU_wr(bit [6:0]      Addr, bit [15:0]     Data)
{
      drvr.drive_CA   ({Addr,1'b0});
      drvr.drive_CD_in(Data       );
      drvr.drive_WRB  (0          );
      drvr.drive_CSB  (0          );
drvr.posedge_clk();
      drvr.drive_CA   (0);
      drvr.drive_CD_in(0);
      drvr.drive_WRB  (1);
      drvr.drive_CSB  (1);
drvr.posedge_clk();
}

function bit [15:0]  cfg_xtor::CPU_rd(bit [6:0]      Addr)
{
      drvr.drive_CA ({Addr,1'b0});
      drvr.drive_WRB(1          );
      drvr.drive_CSB(0          );
drvr.posedge_clk();
      drvr.drive_CA (0);
      drvr.drive_WRB(1);
      drvr.drive_CSB(1);
drvr.posedge_clk();
CPU_rd = drvr.read_CD_out();
}
#endif